RIE=0, RN=0, RI=0, CMPE=0
Voltage Monitor 2 Circuit Control Register 0
| RIE | Voltage Monitor Interrupt/Reset Enable 0 (0): Disabled 1 (1): Enabled |
| Reserved | This bit is read as 0. The write value should be 0. |
| CMPE | Voltage Monitor Circuit Comparison Result Output Enable 0 (0): Voltage Monitor circuit comparison result output disabled. 1 (1): Voltage Monitor circuit comparison result output enabled. |
| Reserved | These bits are read as 000. The write value should be 000. |
| RI | Voltage Monitor Circuit Mode Select 0 (0): Voltage Monitor interrupt during Vdet1 passage 1 (1): Voltage Monitor reset enabled when the voltage falls to and below Vdet1 |
| RN | Voltage Monitor Reset Negate Select 0 (0): Negation follows a stabilization time (tLVD) after VCC > Vdet1 is detected. 1 (1): Negation follows a stabilization time (tLVD) after assertion of the LVD reset. |